Impedance match circuit

[david753]

I am using a AD converter.
http://user52.starbeta.org/others/ad9057_d.pdf
I found on the page 10, there is a reference application circuit.
The R1 is 50(OHM), and C2 is 0.1(uF).
I supposed it is NOT right because of the Input resistance is 150KOHM,
and Input capacitance is 2pf depands on the Analog Input spec. on page2.
What is the real impedance of analog input?
The impedance is 150k+1/jw*(2p)=150000-1990j depends on the RC formula.
So, I have to design a impedance match circuit, don't I?
But, What is the circuit I have to implement?
Does any body can design this Impedance match circuit for me?

[joey7f]

Hi David,<p>My guess is you do not have to design an impedance matching network. If you are using a function/signal generator, the 50 ohm input (which does seem odd to me as well, though I did not spend much time looking at it) is probably reasonably well matched already. <p>What are you inputing into the chip?<p>--Joey

[Externet]

Hi.
R1 seems to be to ensure the test/evaluation suggested source signal generator output is properly loaded.<p>The IC input impedance may be 150K Ohm as specifified, but that whole circuit input impedance is 50 Ohm.<p>Impedance matching is to obtain the maximum power transfer. There is no need to obtain the maximum power transfer in that application.
You can throw away that resistor and circuit will work just fine if levels are respected.<p>Analogy: If your 8 Ohm stereo speaker output is driving an -impedance unmatched- 600 Ohm headphone, and you parallel an 8 Ohm speaker to it. that is what is goung on there. The signal is applied to the 150K Ohm input chip and there is a 50 Ohm load at the same line.
Miguel

[david753]

I already found the answer in my problem.
I use a RCL meter to measure the impedance of analog input, and I got the real input impedance.
Then refering to the real impedance, I design a match circuit.
Finally, the sesitivity is amazingly up 10db,(-25dbm to -35dbm).<p>I wonder why the datasheet doesn't express it clearly?
I suspect the analog Inc. want to increase the sales volumn of evaluation board.
How do you think about it?
I still confused in what the meaning of 150k impedance, and 2p capacitance are?<p>P.S. the input signal is BPSK.

[cato]

They are claiming the part can make 40 million samples per second (MPS). This implies they intend it to measure signals as high as 20Mhz. This is well into the RF (radio Frequency) range.<p>The 50 ohm R1 you refer to is on a BNC (RF) coaxial connector. This implies they expect you to us a coaxial cable to provide an RF input signal. Coaxial cables have a "characteristic impedances", often in the 50 or 75 ohm range. R1 is there to match the impedance of the signal source and cable.<p>C2 is not on the input. It is on another line, called Bias Out. Im not sure what you're supposed to do with the side connected to E2...<p>The input 150k spec means, for example, if you had 150k in series with the input pin, the signal measured by the chip would be 1/2 the amplitude of your input signal due to the voltage divider formed between your resistor and the input resistance. A similar explanation applied to the input cap. Think of them both in parallel between the input pin and signal ground.

[redrocker]

cato, C2 is on the evaluation board and is used in AC-coupling mode. (Connect jumpers E10 to E12.) Looks like it is there to block the DC bias signal from the input. On the output side of the cap, the DC bias signal adds with the AC input signal to push the signal into the single-ended operating region of the device.

[cato]

Oh its quite clear to me that C2 is a dc blocking cap...whats not clear to me is why you would ever connect E3 to anything.

[redrocker]

The literature on page 8 indicates one path is for DC coupled mode, while the E3 path is for AC coupled mode, for whatever that's worth. I guess in a real application you might replace the jumpers with a relay, like in an oscilloscope.