Power Latching IC

[MrAl]

Hi again,

This turns out to be quite an interesting problem.
I like your idea dyarker and if the LED is used it helps keep the circuit
off when the uC powers down.

Here is yet another idea, using a standard PNP transistor.

The PIC shown here puts out a square wave at the I/O pin to
keep the circuit turned on, while it should put out a logical
zero (low) when the circuit is to be turned off.

A little debounce of the switch is good too by delaying the turn on
of the output pulse at program startup by 100ms or so.
The 0.1uf cap shown here is standard for the PIC anyway, but
you may wish to go a little higher in value.

Design criteria:
1. Keep the pulse as close as possible to a square wave.
2. Increase C2 if too much noise on power supply pin.
3. Might want to add a 1N4148 diode across Q1 emitter base to
help protect against too high of a reverse bias.

[dyarker]

How does Q1 stay on with C1 in series?

[MrAl]

Hi again,

dyarker, the transistor does not stay on. It pulses on and charges
C2 and then turns off. In other words, it acts much like the pass
transistor in a switching regulator. Because of this action there is
some ripple voltage across C2 so increasing C2 a little might
be necessary.
When the program wants to turn off the uC's power, it puts out a
constant low (0v) signal which means C1 charges up and Q1
turns off and stays off. It's a little interesting that if the uC puts out
a high (+5v) at the i/o port the transistor will still turn off because
C1 discharges and Q1's base goes high, but once the uC turns
off the i/o pin will fall low which might try to turn Q1 on again so
i thought putting out a low to turn off would be better.
To get around the jitter which you thoughtfully mentioned i thought
maybe a 100ms delay built into the start of the program code would
help prevent accidental turn on when the uC turns off as well as when
power is first applied to the circuit from the battery.