How to select the Gate Drive Resistor

[Leo Hathaway]

I am currently doing my graduate paper design about the drive resistor of MOSFET, be specifically, about the gate drive resistor, and I'm trying to figure out how to use the parts which are available from the Internet.

Fortunately, I find a article about the calculation, there have formulas and calculation, but it has a little confused me that it has no specific case to tell the practical conditions, and in this article"the driving signal is a square wave with a peak value of 12V ", why the peak voltage is 12V? The figures of the formulas exist unclearly or may be my knowledge is not enough.

Is there anyone give me some advice about how to make these figures clearly(enclose the link: https://www.kynix.com/Blog/476.html), or if I want to find more articles like this, where I can search for？

Sincerely,
Leo

[dyarker]

What is your major?

[Leo Hathaway]

My major is electronic engineering, is there any problem?

[dyarker]

Like I said before for the power filter capacitor, doing the math will pick the components.

See if you can find a copy of Fundamentals of Electronic Devices by Ronald J. Tocci.

I am not reference material for a paper.

Turn cell phone off in class.

Cheers,

[haklesup]

For the most part, the gate of a FET is an open circuit so one does not expect much current to be flowing at any time. In general the Gate resistor is a high value, either arbitraritrarily high like 10M or calculated based on AC response. In DC operation, the current is essentially 0A and the resistor acts more as ESD protection and isolation from noise elsewhere in the circuit as anything else assuming we are talking about a series resistor with the gate and not one involved in a voltage divider. In this case the value is not particularly important and usually in the 1M to 10M range, substitutions may have little effect except at turn on T=+0

For AC performance, the value may be relevant. Consider that the gate acts like a capacitor and you are driving it with a periodic signal. Now you have an RC network which will tend to filter the periodic signal. In this case, you want to select a resistor low enough so that the gate capacitance can charge to the appropriate on voltage in time before the signal swings the other way but high enough that the gate is unperturbed by low level transients. Usually one is trying to find the highest practical value for an AC application. Gate capacitance can be obtained from the datasheet in most cases.

Once you know the gate voltage as a function of time, you can apply that the IV function of the VD vs ID to determine output current. A FET driven by a driver IC may not require any series resistor. This happens when you need to turn on the gate fully but don't have a voltage higher than VD to apply to the gate, the driver gives you a boost. At the output (Id) it matters if we are talking about enhancement, depletion, NMOS or PMOS device. For the AC analysis, it doesn't really matter at the input (gate). Enhancement mode NMOS is the easiest to discuss with only positive voltages and currents.