Power Latching IC

[MrAl]

Hello Al,

There was a variation on the SCR called a GTO (gate turn off) device developed by General Electric. The device was turned off by a reverse polarity pulse applied to the gate. It wasn't very practical, since the gate pulse needed was a substantial fraction of the load current that was flowing. For a moderate size of GTO, the turn-off pulse could be fractions of an ampere or posssibly amperes.

This area may have been revisited by one of the Japanese semiconductor companies. I can't recall actual details, but one company may have developed devices with higher turn-off gain than the GE devices.

Hello rshayes,


Ok that's fine, but an SCR is really an SCR, and a GTO is really a GTO.
If someone says "I have an SCR" they usually dont mean "I have
either a regular SCR or a GTO". If they have a GTO they say
"I have a GTO". They are both thyristors, but to most people in the
field if you say SCR you are talking about a device that turns on
with a gate pulse but wont turn off until the cathode current goes
through zero.
Whether it's really that important or not i wont stress too much,
but if you tell someone to buy an SCR you wont find them buying
a GTO in most cases, and the manufacturer will list GTO's as such.

Of course all this is moot anyway, as the voltage drop is still going
to be too much, SCR, Triac, GTO, etc.

BTW, anyone have a spice model for a GTO?

[rshayes]

Hello Al,

The Silicon Controlled Rectifier, the Gate Turn Off switch, and the Silicon Controlled Switch are variations on the same theme. All of them are four layer devices (N-P-N-P). The first N layer is the cathode, the first P layer is the gate, and the last P layer is the anode. In the SCR and the GTO these are the only connections. In the GTO, some provision, probably different doping concentrations in the various layers, has been made to allow current diverted out the gate lead to shut the device off. This may have been as simple as reducing the overall gain of the internal regeneration loop to a value close to one. Diverting some of the feedback current out the gate lead would reduce the gain below one and terminate the regenerative action.

The SCS uses a similar structure, except that an anode gate connection is made to the second N layer. A negative trigger pulse (relative to the anode) applied to this lead can also trigger the device on. This lead can also be used to adjust the sensitivity of the device by connecting a resistor between it and the anode.

A 1977 GE Semiconductor Manual does not list any GTOs or SCSs. I suspect that the production processes were not capable of making these more specialized devices with enough consistancy to be practical.

[MrAl]

Hi again rshayes,

I think you missed the point there...

Regardless of how they work or how they are made, you cant
call a GTO an SCR without causing confusion. I believe the SCR
came about because of the Shockley diode, and it might even
be the same internally. Does this mean we should call the SCR
a Shockley diode? No way.
And it doesnt matter either that the 'normal' SCR *might* be able
to be turned off by shorting out the gate but i wouldnt doubt it
one bit that that would exceed the recommended gate current
by a huge factor. GTO's, on the other hand, are constructed to
take this kind of treatment where to an SCR it's abuse.

The real point though is, if you want to be clear, dont call a GTO an SCR.

[haklesup]

ktomecek, your further explanation changed my POV on what you wanted. Now I see you want a suicide circuit. You want to power on with the button manually and have the circuit or uProc issue the timeout reset. (at first I saw the uProc as a master and some slave circuit to be powered down by it)

Before I go and suggest a solution again, what Uproc chip (P/N and link to datasheet please) are you using. In particular, I am interested to see if it has a reset pin, standby mode or similar and what supply current you get in that state. Additionally its useful to know what other control pins are available (not Addr, data or power) Some devices can get into a standby mode with amazingly low supply current, some by code, some by manipulating a pin. Also are you set on that chip or are you open to alternatives in thee same family.

If standby mode is not inherent to the device than the FET is probably still the best but how you set and reset its conduction will be differnet. You should also consider switch bounce in the design. chatter upon power up can disturb some circuits severely. The datasheet will answer a lot of questions even without the rest of your circuit.

SCRs are indeed good for AC circuits and are reliable when used correctly but for DC switching it has some drawbacks that limit its desirability. However, I have never heard of any logic family that intentionally used SCR structures to achieve simple logic even a NAND gate.

[Bob Scott]

However, I have never heard of any logic family that intentionally used SCR structures to achieve simple logic even a NAND gate.

Hehe. Never heard of the 74SCRXXX series of TTL? Problem is, once they flip, they can't flop.

[haklesup]

Actually CMOS devices have a parasitic PNPN structure that if not designed correctly will trigger and the whole device will turn into a short. This is called CMOS latchup and is tested for in virtually all new designs to prevent its occurance.
http://www.ece.drexel.edu/courses/ECE-E ... ch-up.html

For example, a 74HCT00 device made by Harris (older date codes, harris isn't arounnd anymore and other manufacturers don't necessarily have this problem). Inject about 250mA on an output pin (this takes 7 to 8 V) then the supply current will go from a few nA to over 1A and stay that way until powered down (below the holding voltage) or it burns up.

[MrAl]

Hi again,

hakle:
That's interesting. The kind of latchup im used to thinking about is when
an input pin is allowed to go negative with a substantial amount of
current to drive the pin below ground. It's amazing that this can happen
even without a negative supply because a relatively long signal line
and it's associated inductance can cause ringing at the input pin, of
which some of the oscillation goes below zero and this is what can
cause latchup. The latchup current might be alittle less than 100ma,
and that's consided substantial with CMOS inputs but it's not that
much really.
The solution is to connect a 100 ohm resistor (scale for your input
impedance) in series with the line and this prevents the required latchup
current from ever flowing into the pin. This solution is even recommended
where the line isnt super long (maybe a foot) where a switch is used
to activate an input and the switch is mounted on the front panel of the
product and the circuit board is inside.

Bob:
Hey i like that 74SCRxxx idea ha ha.
Logic, however, comes in many flavors, and not only binary, so with
this in mind the SCR would make an interesting logic gate, just not
the kinds we are more commonly familiar with (AND, OR, XOR, and
even the latching Flip Flop is considered part of logic).

Hey another idea, if the SCR voltage drop is allowable, is to short
the anode to ground. Since the circuit is low voltage low current,
once the SCR is turned on it can be turned off by shorting the anode
to ground (assuming the SCR is put in series with the power supply
plus + line). If the main input power doesnt like a short, then a
resistor placed in series with the anode will mean a little higher
current will flow when the thing is turned off via control of the MCU,
but that will quickly die down once everything shuts off.
This solution however requires that the circuit can take the voltage
drop of the SCR as well as the voltage drop of the extra resistor.
The resistor doesnt have to be a high power rated device either
because the higher power through it only lasts for a few milliseconds or
less (assuming low frequency too).

Also, i dont want to seem like im launching a campaign to make everyone
in the world be sure to call the GTO a GTO and not an SCR, but just
that if you do call a GTO an SCR be prepared to see some confusion,
that's all.

[philba]

I don't get it, why bend over backwards to make an SCR work when a perfectly fine solution can be had with a mosfet? and at a significantly lower voltage drop.

[Chris Smith]

The Gate Turn Off device back when was a SCR type of device, in reverse.

But its main qualitites were that it shut off instead of turn on,... using far more current and voltage.

It was a specific device that was meant to handle voltages that were outrageous in the real world, such as a TV deflection circuit or the Fly back feed.

In the real world it would be out of the norm to use such a simple device, but with immagination Im sure there are many circuits that can be re invented. [8 amps with high gate volatges and currents]

[MrAl]

Hi again,

Philba:
Did i sound like i was pushing the SCR idea? I wasnt really, just
talking about it a little more and thinking about the possibilities.

The thing i do like about the SCR is it's automatic latching ability.
I was going to say it wasnt cost effective, but i found one on
Digikey for 44 cents pn 2N5060G in one piece quantities.
That's about twice what you would pay for a standard low power
Bipolar though, if it matters that much.

Also interesting is i could not find a single GTO at either Digikey or
Mouser.

[Robert Reed]

MrAl
I have never used GTOs, but I am familiar with their operation. From what I remember, there were a ton of problems with these devices and they were removed from the market years ago.

Ktomek
Have you considered your inputs connected to an R-S bistable driving one of those tiny DIP relays - or is contact bounce going to present a problem here?

[MrAl]

Hi again,

Robert that's interesting, i didnt realize they had that much of a problem.
Well, that sort of makes deciding what to call them a bit moot too then
doesnt it...ha ha.

[Mexican]

Standard usage in the 70s and 80s.

That or toss the baby out with the bath water,

ECG and NTE 276 and 279a

[Robert Reed]

But Mexicano Chris
These are still long obsolete parts laying in a dusty corner of some warehouse in China, just waiting for some taker willing to buy 1000 at a crack.

[dyarker]

ktomecek,

In case you're still following this thread, I made a schematic of the P-channel FET idea:

I added Q2 because if the uP pin was connected directly to the FET gate/R1/switch junction, then during power-down the pin would be at a higher voltage than the uP's Vcc. The uP probably wouldn't be damaged because of R1 and internal diode clamp, but the circuit might get stuck at half off. Also, with Q2 a higher supply can be used with a regulator between the FET and uP.

Starting at OFF, resistor holds FET off. Pressing momentary switch turns FET on. uP starts. As early in code as possible, have uP raise the pin going to base of Q2. Q2 turns on, holding the FET on. The switch can now be released. This will probably happen faster than you can move your finger, but optional LED lights when switch can be released.

When uP is ready to turn itself off, it lowers the pin controlling Q2. Q2 turns off, allowing R1 to keep the FET off.

If while powering down the uP "loses it's mind" and lets the pin float, a small capacitor somewhere in Q2 base circuit should prevent half off or on-off oscillation. Let's not worry about this unless the actual circuit misbehaves.

Cheers,