Optoisolator selection

[redrocker]

I am a hobbyist embarking on the conversion from the dsPIC30F to the dsPIC33F series, and since the 33F is 3.3V device, I plan to build a new programmer for it.

My current home-brewed programmer uses 4N25 optos to isolate the PC's parallel port signals from the target. It is painfully slow. I had to slow the clock period in my programming software way down in order to get the operation to work properly.

What might be a good, high-speed, 3.3V optoisolator to use for my new design?

[philba]

http://www.fairchildsemi.com/ds/FO%2FFOD050L.pdf

[redrocker]

Thanks Philba, I put some on order. I learned a hard lesson with this - Mouser carries much more product than they put into their catalog. I could have saved a few dollars on the 33F's by ordering from them rather than MicrochipDirect because the Mouser catalog did not list the 33F series when in fact they do stock a couple of them. Oh well, not big deal.

[philba]

yeah, I'm a really big fan of mouser. best prices on PICs. On other stuff, it's usually cheaper than DigiKey, come times a lot. but there are expections.

what I really wish is that they carried National and Analog Devices.

by the way, what is your programmer - got schematics you can share?

[redrocker]

Oh, the hardware portion of my programmer is a piece of crap - I would give its schematic away for a nickel.

The part that took time was the PC software. It's not great, either. I bit-bang the parallel port as fast as possible using a high speed clock available on the PC.

I hope these new optos improve the situation a bit. I should be able to test them with my existing arrangement, although that is complicated by the fact that Microchiip has eliminated the high-voltage requirement within its 33F programming specification.

[redrocker]

Now that I have received the recommended optos, I have a question about their use. Here is the internal schematic of the part:



The data sheet says the following:

A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the base-collector capacitance of the input transistor.

I am pretty sure they are making reference to pin 7, Vb. However, they do not show how to use this pin. Their test circuits leave this pin open. How, then, should the Vb pin be biased?

[philba]

This is a bit tricky but the datasheet does give you some clues. the way I would think about it is to start with the circuit that the part goes into. Collector will be pulled up so it will tend to be at Vcc. Then the speed question is how strongly will the based be pulled low. The idea is that the photo diode may need some help keeping the base voltage (and thus the current) low.

If you have a scope and a square wave generator, you can figure out the optimal values. I would guess that the lower the base resistor, the faster the switching but a starting guess of 10:1 base resistor to collector pull-up resistor ratio wouldn't be bad. I would experiment a bit with the values -- 4.7K pull-up (they call it a load resistor in the switching test diagram) and 47K base to gnd. Note that the datasheet talks about a wide range of pull-ups: 4.1K, 5.6K, 6.1K

I'd appreciate it if you report back on your results.

Phil