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I am building an embedded controller using 74xxx chips as decoders, latches, logic, etc. The 8088 has 20 address lines. AD0-AD7 and A16-A19 are multiplexed and definitely require latching. Do the remaining A8-A16 require latching? Based on the timing diagram given in the spec, I think not, but my system is definitly not working so I thought someone might know. . .
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