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Is there any one with information that can help me to interface 2, 555 timers, one set up for astable operation, with the other set up for as a one shot with a pulse width of ten seconds. the output of the first timer is 1Hz and is connected to the cp pin on a 74163 counter with the out of the second timer conneted to one input of a 2 input and gate , the other input of the and gate is connected to the 5 volt supply voltage, creating a window of ten seconds for the counter. the and gates output is connected to memory reset of the counter. The counters output is decoded for 10seconds with a 2 input and gate, which feeds a latch circuit made from a 7400 quad 2 input nand gate.The output of the nand latch feeds a tansistor that triggers a relay with a delayed output of ten seconds once the one shot is triggered. The problem im having is getting the circuit to operate properly.When all connected it seems to make the one shot trigger voltage flucuate an continues to trigger I have tryed tying the trigger pin to vcc thru a 100k resistor an it seems to work until the whole circuit is connected, then the trigger pin resumes to flucuate again. If theres any one with info as to what i can try to get the voltage on the one shot to remain constant until triggerd, (taken to ground)Im hoping you can pass it on to me. Your help will be most appreciated.

The first thing that I can tell is that you might have a problem if you are using TTL and CMOS. The 74163 comes in both, and so does the 7400. Not to mention the 555 which also comes in a handy CMOS version. Heres a simple list of types
CMOS:
CD, HC, AHC, AC<p>TTL:
LS, TTL, S, ALS, AS, F, BCT, ABT, HCT, AHCT, ACT<p>Most of these "fixes" should be located after the 74 but before the -163, -00. Otherwise I believe it is TTL, as the CD family is hovers around 4xxx.
Also on the 555, if you are using TTL, make sure that the 555's don't have a "c" in there markings, like LM555C or LMC555.

The Texas Instruments web page has a link to their digital products page of which you can research this further. <p>One thing that is not clear to me is "decoded through a 2 input AND gate". And also, if the AND gate is the only thing input to the latch, as it sounds, you may need another input on your latch, I'm not quite sure of the possible operation of a latch with only one input, but usually there is a set and a reset, this could possibly be causing you some problems.<p>Douglas

I tried drawing the circuit, but schematic doesn't match your description. It would be easier to help you if we knew what the circuit is intended for.<p>But here are a few ideas..<p> - the TTL to CMOS is a valid point. TTL will drive cmos, but you need to add pull ups when cmos drives TTL.<p> - IMHO the 74193 is a better counter than the 74163<p> - your reset pulse my need to be latched.. or pulled from a different source. The way I see the circuit, the reset will be valid for only the time the gate switches (time varies with logic family) If your ckt works in simulation, but not in reality, I would check this portion first.<p> - for keeping the output steady, if it doesn't fluctuat too much... run it through an open and gate or through an inverter. That should keep it steady as long as the fluctuations don't cross the switching voltage.<p>Don't know if this helps.. so good luck