Emitter follower as current booster

[vinod]

If you want more accurate steps then you have to clamp the 5v going to the divider. A way to do this is through another op amp set up to clamp the output at 5v, or if a zener diode is good enough you can use a resistor plus zener. Im wondering how did you expect to get 5v out of the 555 when it is powered by a 10v supply line? Wouldnt that mean it puts out close to 10 volts for the peak? A resistor and zener would clamp that to 5v or near that. If you want really accurate then maybe an op amp and reference diode to buffer the 555 output and clamp the output to 5.00 volts.

Actually my 555 output at 10 V is greater than 5V and I used 50K POT to adjust it to the required level at load. For example take output from 4.5V leg of ladder and adjust the 50K POT to get 4.5V across the load. Without disturbing the set value of POT take output at all other voltage positions. One time adjustment is applicable for all voltage levels.

If I have exact 5V at top of ladder then this one time 50K adjustment is not required. For that I can use the cases you said, or 74121 / 74123 ICs as they can output exact 5V.

Anomaly:
If I have exact 5V at top of ladder then resistors of the ladder should be have 0.01% tolerance levels for equal divisions of this 5V.
My doubt is then the 50K in parallel with them could change the balanced condition of the ladder. Thus no equal voltage divisions takes place. Can I avoid this by placing 100K or 1M ohms (>> 1K ladder) in place of 50K without disturbing both ladder and the op-amp.

If I avoid POT and connect op-amp directly to ladder , then floating condition would be resulted between switching intervals of ladder outs.

[sghioto]

Vinod,

Have you had a chance to test the circuit using the 74LS14 debouncer?
You mention you were using a SPDT switch. I came across this circuit in my design library that uses two inverters to debounce the switch wired as in the attachment.
I have not tried this circuit but thought it looked interesting.

Steve G

[vinod]

Vinod,

Have you had a chance to test the circuit using the 74LS14 debouncer?
You mention you were using a SPDT switch. I came across this circuit in my design library that uses two inverters to debounce the switch wired as in the attachment.
I have not tried this circuit but thought it looked interesting.

Steve G

How can this latch configuration will avoid bounces?
In the up position the output is high and low in the down position. So for triggering switch contact has to be come down to lower part. (NC to NO position)

[sghioto]

How can this latch configuration will avoid bounces?

It works because the inverters are much faster then the mechanical switch. As soon as the NC position is opened the output of IC3A will go low and make the input of IC3B low before the switch gets to the NO position and vice versa when released. Switching times are typically less then 20ns.

Steve G

[MrAl]

If you want more accurate steps then you have to clamp the 5v going to the divider. A way to do this is through another op amp set up to clamp the output at 5v, or if a zener diode is good enough you can use a resistor plus zener. Im wondering how did you expect to get 5v out of the 555 when it is powered by a 10v supply line? Wouldnt that mean it puts out close to 10 volts for the peak? A resistor and zener would clamp that to 5v or near that. If you want really accurate then maybe an op amp and reference diode to buffer the 555 output and clamp the output to 5.00 volts.

Actually my 555 output at 10 V is greater than 5V and I used 50K POT to adjust it to the required level at load. For example take output from 4.5V leg of ladder and adjust the 50K POT to get 4.5V across the load. Without disturbing the set value of POT take output at all other voltage positions. One time adjustment is applicable for all voltage levels.

If I have exact 5V at top of ladder then this one time 50K adjustment is not required. For that I can use the cases you said, or 74121 / 74123 ICs as they can output exact 5V.

Anomaly:
If I have exact 5V at top of ladder then resistors of the ladder should be have 0.01% tolerance levels for equal divisions of this 5V.
My doubt is then the 50K in parallel with them could change the balanced condition of the ladder. Thus no equal voltage divisions takes place. Can I avoid this by placing 100K or 1M ohms (>> 1K ladder) in place of 50K without disturbing both ladder and the op-amp.

If I avoid POT and connect op-amp directly to ladder , then floating condition would be resulted between switching intervals of ladder outs.

Hi again,


If you use a pot with the 0.1 percent tolerance resistors then the effect will be that the resistance of the pot will alter the temperature characteristics of the whole string. If the pot can change by 5 percent, then depending on how it is connected means it may affect the resistance over temperature by a larger amount or a smaller amount.
For example, a 1 percent resistor of 100 ohms can rise to 101 ohms, but a 10 percent resistor of 100 ohms can rise to 110 ohms, so if these were in series 100+100=200 ohms normally, then after the temperature rise we would get 101+110=211 ohms which is roughly 5 percent tolerance. So the 10 percent resistor in this case made the tolerance worse but only by about half of it's tolerance.
If the resistor that changes a lot is much higher than the other, then the tolerance is worse in series but not as bad in parallel. For example a 1000 ohm 10 percent resistor in parallel with a 100 ohm 1 percent resistor results in a (roughly) 2 percent tolerance resistor.
The way to calculate this is to simply calculate the total resistance using the nominal values (1000 and 100 for example) then calculate again using the temperature rise max resistances (1100 and 101 for example for a 10 percent and 1 percent tolerance set). Then divide one by the other to get the new tolerance.

[Robert Reed]

Eliminate the 50K pot. For the sake of example, lets say you had a 10 volt output at 555 pin 3. That would require a 1K series resistor in series with the 1K ladder resulting in 5V at the top. Use a precision resistor close in value but somewhat lower than that, maybe 950 ohm. Now add a 100 ohm pot in series (maybe multi turn) and adjust for the needed exact 5 volts at the top of the ladder. Pot now has minimal effect due to its temp coefficient. Worried about Op-Amp floating input during switching operations? Then use a make before break type contact.
One question though, do you have the quality instrumentation to confirm the accuracy you are after?

[vinod]

One question though, do you have the quality instrumentation to confirm the accuracy you are after?

Keithley 2700 multimeter
TDK Lambda ZUP 60-7 420W supply

[vinod]

Eliminate the 50K pot. For the sake of example, lets say you had a 10 volt output at 555 pin 3. That would require a 1K series resistor in series with the 1K ladder resulting in 5V at the top. Use a precision resistor close in value but somewhat lower than that, maybe 950 ohm. Now add a 100 ohm pot in series (maybe multi turn) and adjust for the needed exact 5 volts at the top of the ladder. Pot now has minimal effect due to its temp coefficient. Worried about Op-Amp floating input during switching operations? Then use a make before break type contact .

See the below attachment and is suggested by my friend Roff.

But Output of CMOS 555 is only 4.7V at 5V supply ! But I want 5V at output.

So I replaced CD4047 for CMOS 555 as it outputs exact 5V(typical with min value of 4.95V) at 5V VDD supply.

Because of this 5V, he gave it directly to ladder top. And used 1MOhm resistor to overcome floating problems during switching as 1M >> 1K it wouldn't affect the balanced ladder config. But as 'MrAI' pointed out the high tolerance level of 1M may affect 0.01% tol levels of each 100R at each output position of the ladder.

So the solution is as Reed told I have to amplify 5V at output of 4047 to 10V using non-inverting op-amp amplifier having LM324. Then use 950+100R trim pot and make before break type contact as suggested by 'sghioto'(but it is for digital levels not for analog).

NOTE: Can I use any resistor network ICs to simulate the role of good tolerance resistance ladder ?
Can I use any analog MUXs to switch voltage levels from 0 to 5V in 0.5V steps between ladder and output driver transistor ?

[vinod]

How can this latch configuration will avoid bounces?

It works because the inverters are much faster then the mechanical switch. As soon as the NC position is opened the output of IC3A will go low and make the input of IC3B low before the switch gets to the NO position and vice versa when released. Switching times are typically less then 20ns.

Steve G

Make-Before-Break contact

[sghioto]

Use an adjustable regulator with the 555 so you can set the output at exactly 5 volts with the resistor ladder connected directly to the 555 output and U2 input, keep R4. Eliminate U3 and Q2.

Vinod said:

Make-Before-Break contact

No it 's not a make before break switch. Just a standard SPDT switch used in the debounce circuit.

Steve G

[vinod]

Use an adjustable regulator with the 555 so you can set the output at exactly 5 volts

Steve G

Can I use 7805 with the selected values of resistances to get the adjustable voltage around 5-7V.

[sghioto]

Can I use 7805 with the selected values of resistances to get the adjustable voltage around 5-7V.

You can but I would use a LM317L with the values chosen to give a more finite adjustment

Since the cmos 555 cannot source much current I modified the circuit again using another LM324 stage to buffer the resistor ladder. This will eliminate the load on the 555 to give 4.95 volt output with 5 volt supply

Steve G

[vinod]

Since the cmos 555 canot source much current I modified the circuit again using another LM324 stage to buffer the resistor ladder. This will eliminate the load on the 555 to give 4.95 volt output with 5 volt supply

Steve G

1. U3(now you renamed as U1 LM324) is there so that the output current of 555 will be minimum due to input impedance of Op-amp. Thus 555 can output exact 5V at output with 5V supply(as per the datasheet at no load condition ) and the facility of rail-to-rail. This is helpful as I want 0 to 5V at output.

2. In this way can I use Q2(BC 107 as emitter follower) also that you have eliminated as it handle the load better than op-amp. Without the emitter follower on U3, the top of the ladder could only go as low as the saturation voltage of U3, which will always be greater than zero volts, especially if you are using an LM324. With the emitter follower, U3 can go low enough to completely cut off the emitter follower, assuring 0V on the top of the ladder

3. Can you include the trigger section also in your schematic with facility for bounce suppression ?

4. I am going to replace 100 Ohms(10 nos) in ladder with 350 Ohms(10 nos) as 0.01% tolerance 350 Ohm resistors are available at our store.

[sghioto]

As requested.

Steve G

[vinod]

As requested.

Steve G

But for your circuit the pressing time would affect the pulse width of 555 output ?

I think latch output should be subjected to some type of signal conditioning like Differentiating ! 1nF C2 is doing that function.